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[Other Embeded program] ddr_sdram_controller

Description: DDR SDRAM Controller design
Platform: | Size: 2400256 | Author: Jerry | Hits:

[ARM-PowerPC-ColdFire-MIPS] HY5DU121622CFP

Description: 64MB 512Mb, 16bit, DDR SDRAM MEMORY
Platform: | Size: 1558528 | Author: lzch | Hits:

[Software Engineering] SDRAM

Description: 连接Nios II 和SDRAM的系统设计，DDR SDRAM设计及调试经验总结，MT48LC16M16资料。-failed to translate
Platform: | Size: 1903616 | Author: luyi | Hits:

[Program doc] DDRdesigen.pdf

Description: DDR SDRAM设计及调试经验总结.pdf-DDR SDRAM design and debug Experience. Pdf
Platform: | Size: 338944 | Author: Mike | Hits:

[VHDL-FPGA-Verilog] ref-ddr-sdram-verilog

Description: ddr_sdram开发参考verilog建模-ddr_sdram with verilog
Platform: | Size: 753664 | Author: pengyong | Hits:

[Software Engineering] ddr_sdr_V1_1

Description: its the vhdl stuff for ddr sdram controller nice one easily understandable-its the vhdl stuff for ddr sdram controller nice one easily understandable
Platform: | Size: 37888 | Author: james | Hits:

[Other Embeded program] Hardware_and_Layout_Design_Considerations_for_DDR_

Description: DDR SDRAM接口的硬件和布线设计指南。DDR SDRAM的传输速度越来越高，对走线的要求也越来越高。-DDR SDRAM HARDWARE LAYOUT DESIGN
Platform: | Size: 692224 | Author: 朱伟华 | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM

Description: ddr sdram 的控制程序，lattice的，比较好用的，大家-ddr sdram control program, lattice, and relatively easy to use, and we look
Platform: | Size: 8483840 | Author: 熊熊 | Hits:

[VHDL-FPGA-Verilog] Altera_DDR_controller_core

Description: Altera DDR SDRAM控制器完整Verilog代码包，包括Verilog源代码，Doc说明文档，仿真DDR芯片模型，仿真testbench等-Altera DDR SDRAM Controller. Verilog source codes, description documents, DDR verilog model and simulation testbench are all included.
Platform: | Size: 752640 | Author: 沈志 | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM

Description: 本应用指南描述了在 Virtex™ -4 XC4VLX25 FF668 -10C 器件中实现的 DDR SDRAM 控制器。该实现运用了直接时钟控制技术来实现数据采集，并采用自动校准电路来调整数据线上的延迟。-This application note describes a Virtex ™ -4 XC4VLX25 FF668-10C to implement the DDR SDRAM device controller. The clock control to achieve use of technology to achieve direct data acquisition, and automatic calibration circuit to adjust the data in line delay.
Platform: | Size: 54272 | Author: syf | Hits:

[VHDL-FPGA-Verilog] FPGA-SDRAM-control-code

Description: 该程序是FPGA控制DDR SRAM的控制源代码，使得SDRAM的控制变得简单。-This program is DDR SDRAM control code ,it makes the operation of SDRAM more easy.
Platform: | Size: 41984 | Author: didi | Hits:

[VHDL-FPGA-Verilog] model

Description: 用vhdl写的 ddr sdram 控制器,数据位可以修改。在quartus2下仿真通过-With written ddr sdram controller vhdl
Platform: | Size: 7168 | Author: momowang | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM

Description: DDR SDRAM的设计，包括DDR SDRAM控制器，以及Modelsim仿真-The design of DDR SDRAM, DDR SDRAM controller, and Modelsim simulation
Platform: | Size: 897024 | Author: xinghe | Hits:

[Windows Develop] DDR-SDRAM

Description: ddr sdram 控制器的源代码，内有vhdl和verilog。-DDR SDRAM controller
Platform: | Size: 903168 | Author: 何海山 | Hits:

[Other] DDR-SDRAM--controllor-of-FPGA

Description: 本文档设计了一种FPGA控制DDR SDRAM的方法，详细介绍了控制内容。比较有参考价值。-This document is designed DDR SDRAM, a FPGA control method, detailed control content. Reference value.
Platform: | Size: 64512 | Author: 秦艳召 | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM-controller-verilog-code

Description: DDR SDRAM控制器verilog代码及中文说明文档-DDR SDRAM controller verilog code and documentation
Platform: | Size: 488448 | Author: 一样 | Hits:

[VHDL-FPGA-Verilog] ddr-sdram-control

Description: ddr sdram控制器的设计与验证，提供了一种极为可靠且简易的控制器设计方案。-DDR SDRAM controller design and verification, providing an extremely reliable and simple controller design.
Platform: | Size: 769024 | Author: 毛洋 | Hits:

[Software Engineering] DDR-SDRAM-design-and-debugging

Description: DDR SDRAM设计及调试经验总结 DDR SDRAM设计及调试经验总结-DDR SDRAM design and debugging Experience
Platform: | Size: 340992 | Author: 张力 | Hits:

[Other] DDR-SDRAM

Description: DDR SDRAM控制器的FPGA实现-DDR SDRAM Controller with FPGA
Platform: | Size: 249856 | Author: pzf | Hits:

[VHDL-FPGA-Verilog] verilog-ddr-sdram

Description: 用verilog实现的ddr sdram控制器-ddr sdram by verilog hdl
Platform: | Size: 752640 | Author: 黄志沛 | Hits:
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